In computing machine scheduling, turn toing manners are chiefly of involvement to compiler authors. Different computing machine architectures vary greatly as to the figure of turn toing manners they provide in hardware. The different turn toing manners of 8086 microprocessor are
This manner transfers a byte or word from beginning registry or memory location to the finish registry or memory location. In this manner the beginning registry does non alter, but the finish does.
MOV AX, BX Copies the word from registry BX to Axe
This manner shows that the existent operand is stored in the address field of the direction. Generally, immediate operands represent changeless information. Since no memory entree is needed, it is called immediate addressing.
MOV AX,22H Moves 22 hexadecimal into AX
Direct Data Addressing:
This manner is different from the immediate addressing in that the location following the direction opcode hold an effectual memory reference ( EA ) alternatively of informations. This effectual reference is the 16-bit beginning of the storage location of the operand from the current value in the DS registry.
MOV BX, FFFF Moves the contents at memory location FFFFH into BX
Register Indirect Addressing Mode
This manner is similar to the direct addressing in that an effectual reference effectual reference resides in either a arrow registry or an index registry.
The direct addressing method lends itself to applications where the value of Effective Address is a changeless. The registry indirect addressing can be used when the value of Effective reference is calculated and stored. That is, it is a variable.
Example: – MOV AX, [ SI ]
Moves the contents of the memory location offset by the value of effectual reference in SI from the beginning of the current information section to the AX registry
Based Addressing Mode
The PA of the operand is obtained by adding a direct or indirect supplanting to the contents of either basal registry BX or base arrow BP and the current value in DS or SS severally.
Example MOV [ BX ] +BETA, AL
This direction uses basal registry BX and direct supplanting BETA to deduce the EA of the finish operand. The based addressing manner is implemented by stipulating the base registry in brackets followed by a + mark and the direct supplanting. The beginning operand in this illustration is located in byte collector AL.
Index Addressing Mode
This manner works identically to the based addressing, nevertheless it uses the contents of one of the index registries, alternatively of BX or BP, in the coevals of the physical reference.
Example: MOV AL, [ SI ] +ARRAY
Based Indexed Addressing Mode
This manner, uniting the based addressing manner and the indexed addressing manner together, consequences in a new, more powerful manner. This type of turn toing utilizations one base registry ( BP or BX ) and one index registry ( DI or SI ) to indirectly address memory.
Example: MOV DX, [ BX+DI ]
This direction transfers a transcript of word from location [ BX+DI ] into the registry DX
Register Relative Addressing
This manner of turn toing is similar to base-plus-index addressing. The information in a section of memory are addressed by adding the supplanting to the content of a base or an index registry.
MOV AX [ DI+100H ] The word content of the information section memory location references by DI plus 100H is copied into registry AX.
Base Relative-Plus-Index Addressing
The base comparative plus index addressing is similar to the base-plus-index adressing manner, but adds a supplanting besides utilizing a base registry and an index registry to organize the memory reference. In, other words this manner addresses a two dimensional array of memory reference.
Example: MOV DH, [ BX+DI+20H ]
DH is loaded with the informations nowadays in the reference given by [ BX+DI+20H ]
This is specific manner of turn toing when threading related instructions are being used. This manner uses index registries. SI registry is used to indicate the first byte or word of the beginning twine and the DI is used to indicate the corresponding first word of finish twine.
This sections aims at researching assorted operations supported by the 8086 microprocessor. These operations are loosely classified into 3__ classs
Data Transfer Operationss:
Data transportation operation is one of the most common operation within any subprogram of a plan. A set of Data transportation instructions are defined which move individual bytes, words and dual words between memory and registries AL or AX and Input/output ports.
These informations transportation instructions are loosely segregated as
1 General Purpose Data Transportations:
MOV finish, beginning This direction transfers a byte or word from the beginning operand to the finish operand.
PUSH beginning PUSH direction decreases the stack arrow by two and reassign a word from the beginning operand to the top of the stack.
POP finish It transfers the word at the current top of stack to the finish operand and increases stack arrow by two.
XCHG translate-table It switches the contents of the beginning and finish operands
XLAT It replaces a byte in the AL registry with a byte from a 256-byte, user coded interlingual rendition tabular array. It is by and large utile for interpreting characters from one codification to another.
IN collector, port It transfers a byte or word from an input port t the AL registry or the AX registry severally. The port is either specified or obtained from DX registry
OUT port, collector It transfers a byte or a word from the AL registry to an end product port.
Address Object Transfers
These are instructions by and large used to the reference of variables instead than the contents and are utile for list treating an twine operations. The instructions used for this are
LEA finish, beginning Load Effective Address transfers the beginning of the beginning operand to the finish operand. The beginning operand needs to be a memory operand and the finish operand must be a 16-bit general registry.
LDS finish, beginning Load arrow utilizing DS, transfers a 32-bit arrow variable from the beginning operand to the finish registry and registry DS. The beginning word of arrow is transferred to destination operand and section word of the arrow to the registry DS.
LES finish, beginning Load arrow utilizing ES, transfers a 32-bit arrow variable from the beginning operand to the finish operand and registry ES
LAHF Load Register AH from flags transcripts SF, ZF, AF, PF and CF into spots 7,6,4,2 and 0 severally, of registry AH. The flags are non affected in the transportation
SAHF Store Register AH into flags transportations bits 7,6,4,2 and 0 from registry AH into SF, ZF, AF, PF and CF severally, replacing the old flags
PUSHF It decreases the SP by two and so transportations all flags into the word at the top of the stack pointed by it.
POPF It transfers specific spots from the word at the current top of stack into flags replacing the old flags. PUSHF and POPF allow a process to salvage and reconstruct a naming plan ‘s flags..
Arithmetical Instruction manuals
Arithmetical Operations involve mathematical uses on informations. These uses can be made on four types of Numberss viz. unsigned double star, signed binary, unsigned packed denary and unsigned unpacked decimal. Arithmetical instructions post certain features of the consequence of the operation to six flags viz. Carry Flag, Auxiliary Flag, Sign Flag, Zero Flag, Parity Flag, Overflow flag.
Assorted mathematical operations that can be performed are:
ADD finish, beginning
The amount of two operands, which may be bytes or words, replaces the finish operand. Both operands may be signed or unsigned binary Numberss. All the flags are suitably updated.
ADC finish, beginning
Add with carry sums the operands, which may be bytes or words, and adds 1 if Carry flag is set, and replaces the finish operand with consequence. Since the carry is taken attention of, Numberss longer than 16 spot besides can be added utilizing modus operandis.
INC adds one to the finish operand. All the flags except the Carry flag are suitably changed.
Abdominal aortic aneurysm
ASCII adjust for add-on manipulates the contents of registry AL into a valid unpacked denary figure. The higher order half-byte is zeroed. AAA updates AF and CF. Rest of the flags are vague.
Decimal adjust for add-on corrects the consequence of antecedently adding two valid packed denary operands. It changes the contents of AL to a brace of valid packed denary figures.
SUB finish, beginning
The difference of two operands, which may be bytes or words, replaces the finish operand. Both operands may be signed or unsigned binary Numberss. All the flags are suitably updated.
SBB finish, beginning
It subtracts the beginning from the finish and subtracts 1 if Carry flag is set, and replaces the finish operand with consequence. Since it incorporates a borrow from old operation, it can be used to deduct Numberss longer than 16 spot besides.
DEC subtracts one from the finish operand. the operands may be signed or unsigned binary Numberss. All the flags are suitably changed except the Carry flag.
This direction negates the consequence to the finish. This forms the 2 ‘s compliment of the figure, efficaciously change by reversaling the mark of the whole number. All flags are updated except the carry flag, which is ever set except when the operand is zero where it is cleared.
Compare subtracts the beginning from the finish but does non return a consequence. the operands are unchanged but the flags are updated and can be tested utilizing a conditional leap map. The comparing reflected in the flags is that of the finish to the beginning.
Associate in applied science
ASCII adjust for minus corrects the consequence of old minus of two valid unpacked denary operands. The higher order half-byte is zeroed. AAS updates AF and CF. Rest of the flags are vague.
Decimal adjust for minus corrects the consequence of antecedently adding two valid packed denary operands. It changes the contents of AL to a brace of valid packed denary figures and updates all the flags except the OF which is vague.
It performs an unsigned generation of the beginning operand and the collector. If the beginning is a byte it is multiplied by AL registry and the dual length is returned in AH and AL. If the beginning operand is a word, so it multiplied by registry AX and the dual length is returned to DX and AX. When CF and OF are set they indicate that AH and DX contains important figures of consequences. Rest of the flags are vague
Integer multiply performs a signed generation of the beginning and the collector. It performs similar operation of MUL. The CF and OF are set if the upper half of consequence is non the mark extension of the lower half of consequence.
ASCII adjust for generation of old generation of two valid unpacked denary operands. The higher-order half-bytes of the multiplied operands must hold been 0H for AAM to bring forth a right consequence.
divide performs an unsigned division of the collector by the beginning operand. If the beginning is a byte it is divided into the double-length dividend assumed to be in registry AH and AL. If the beginning operand is a word, so it divided into the dual length dividend in DX and AX. If the quotient exceeds the capacity of registry a type 0 interrupt is generated. Non-integer quotients are truncated to whole numbers and the balance has same sig as dividend.
Integer division performs a signed division of the collector by the beginning operand.. It performs similar operation of DIV. The content of all flags are vague.
ASCII adjust for Division modifies the numerator in the AL before spliting two valid unpacked denary operands so that the quotient is besides a valid unpacked denary figure. The higher-order half-bytes of the multiplied operands must hold been 0H for AAM to bring forth a right consequence. AH must be zero for subsequent DIV to bring forth the right consequence.
Convert byte to word extends the mark of the byte in registry AL throughout registry AH. CBW does non impact any flags. CBW can be used to bring forth a dual length dividend from a byte prior to executing byte division.
Convert word to double-word extends the mark of the word in registry AX throughout registry DX. CWD does non impact any flags.
Bit Manipulation Instructions
Three groups of instructions are available for pull stringsing spots within both bytes and words
The logical instructions include the Boolean operators. The flags are suitably affected by the instructions. The OF and CF are ever cleared by logical instructions, and the contents of AF is ever vague following executing of logical operation.
The SF, ZF, and PF are ever posted to reflect the consequence of the operation and can be tested by conditional leap direction. The readings are same as arithmetic instructions.
It inverts the spots utilizing the 1 ‘s complement of the byte or word operand. It has no consequence on the flags
AND finish, beginning
It performs the logical AND of the two operands and returns the consequence to the finish operand. A spot in the consequence is set if both matching spots of the original operands are set.
OR finish, beginning
It performs the logical inclusive OR of the two operands and returns the consequence to the finish operand. A spot in the consequence is set if either or both corresponding spots of the original operands are set.
XOR finish, beginning
It performs the logical sole OR of the two operands and returns the consequence to the finish operand. A spot in the consequence is set if the matching spots of hee original operands contain opposite values.
Trial finish, beginning
It performs the logical and ” of the two operands, updates the flags, but does non return the consequence. A JNZ is by and large used to look into if there are any 1s is either operands.
The spots in bytes and words may be shifted arithmetically or logically. Arithmetical displacements may be used to multiply and split binary Numberss by powers of two. they are besides used to insulate spots in bytes and words
AF is ever vague following a displacement operation. CF ever has the value of the last spot shifted out of the finish operand. The contents of OF is ever vague following a multi-bit displacement. In a single-bit displacement OF is set if the high-order spot was changed by the operation.
SHL/SAL finish, count
Shift logical left/ Shift arithmetic left execute a spot displacement to left by the figure of times specified in the count operand. Nothings are shifted in on the right. If the mark spot retains its original value, so OF is cleared.
SHR finish, beginning
Shift local right displacements the spots in the finish operand to compensate by the figure of spots specified in the count operand. nothings are shifted in on the left. If the mark spot retains its original value, so OF is cleared.
SAR finish, count
Shift arithmetic right displacements the spots in the finish operand to compensate by the figure of spots specified in the count operand. Spots equal to the original high order spot are shifted in on the left, continuing the mark of the original value/
Spots in bytes and words can be rotated. spot rotated out of an operand are non lost as in a displacement but are circled back into the other terminal of the operand. As in the displacement instructions, the figure of spots to be rotated is taken from the count operand, which may stipulate either a changeless 1, or the CL registry.
Rotates affect merely the carry and overflow flags. CF ever contains the value of the last spot rotated out.
ROL finish, count
Rotate left rotates the finish byte or word by the figure of spots specified in the count operand.
ROR finish, count
Revolve right ” operates similar to ROL except that the spots in the finish byte or word by the figure of spots specified in the count operand to the right.
RCL finish, count
Rotate through carry left rotates the spots in the byte or word finish operand to the left by the figure of spots specified in the count operand. The CF is treated as ‘part-of ‘ the finish operand.
RCR finish, count
Rotate through carry right operates precisely like RCL except that the spots were rotated right alternatively of left.